The AVR8 Soft Processor core is an AVR instruction set compatible processor that is optimized to run on the
Papilio One (Butterfly One) FPGA hardware. It is based on the ATmega103 processor and includes a full toolchain to compile and run C code developed with avr-gcc. Existing C code should be easily ported and C code written for the ATmega103 may run without modification. The major differences between the AVR8 and the ATmega103 are in the amount of memory available and the lack of analog inputs.
Video Demo of loading C Code onto the AVR8 ATmega103
compatible Soft Processor.
Motivation for Porting the AVR8 to the Butterfly Hardware
The motivation for this project was to provide an easy to
implement Open Source microcontroller core with a fully working C
compiler for use with an FPGA. Implementing something that is
compatible with the AVR instruction set was more important than
emulating any particular hardware device. We wanted to provide an
environment that would make people who are familiar with development
on the AVR feel at home on an FPGA. We want people to see that
development on an FPGA doesn't have to entail learning a whole new
set of tools and HDL language such as VHDL or Verilog. We are
attempting to lower the learning curve and entry point for FPGA
development. Our goal is to do a similar thing for the FPGA that the
Arduino did for microcontrollers which is to provide software and
tools that made people realize, "Hey, this is something I can do.".
Example Usage Scenarios
Someone who has an existing AVR microcontroller design and
is running into the limitations of the microcontroller. They may
need to decode raw infrared signals, generate multiple PWM
signals, or send an image to a LCD screen. A microcontroller may
become overwhelmed with these sorts of high speed parallel tasks
but an FPGA would find them trivial. An AVR instruction set
compatible core would make it very easy to port the existing
design to run on the FPGA and the designer would only have to
figure out the HDL for the small portion they cannot accomplish
in the microcontroller. Much less daunting then trying to
re-implement their whole design in VHDL or Verilog.
Someone who wants to start developing with an FPGA
faces the daunting task of learning a new HDL language which is
very different from anything else out there. It is very
difficult for a beginner to make any useful design with HDL. A
microcontroller core allows someone to be productive on an FPGA
right away. Especially a microcontroller core that is based on
an instruction set they already know. There are other FPGA
microcontroller options but they are either expensive, like
Microblaze, or they require a lot of FPGA/HDL experience to
implement. We are providing a core that is ready to go and free.
People can get a design up and running with the core and then
start adding HDL functionality into their project in much
smaller and digestible chunks.
Educational, looking at this open source core provides
a concrete example of how to implement a VHDL core on an FPGA.
It also allows someone who is interested in how a
microcontroller operates to see the inner workings and to
simulate how all the pieces go together.
Related
The AVR8 Soft Processor runs on the same hardware as our 100Mhz,
32 channel
Logic Analyzer. With a little work it is even possible to
integrate the Logic Analyzer with the AVR8 processor and enable
debugging of the AVR8 pins without the need to connect any flying
leads.
Specifications
Features
AVR instruction set compatible Soft Processor core
Based on the ATmega103 processor.
Written in VHDL with full source code available under GPL.
Runs C code written for avr-gcc
Other non open source compilers should work but are not supported.
BRAM based memory allows changes to C code to be compiled and loaded onto the FPGA in seconds.
4Kb x 8 (4KB) SRAM
4Kb x 16 (8KB) Program memory
The S3E-250 Cocoon has a total 24KB of memory available to increase the size of SRAM or Program memory.
8Mhz system clock
Clock can be increased, only testing will determine the maximum frequency.
32 x 8 general purpose registers
Two parallel ports
As many parallel ports as needed can be easily added.
Programmable UART
Twenty three interrupt vectors
Two 8-bit Timer/Counters with separate prescalers and PWM (Not Tested)
Eight external interrupt sources (Not Tested)
Limitations
The original ATmega103 has 128KB of Program memory space. The most that can currently be used with the soft processor is 20KB.
There are no Analog inputs available.
There is currently no SPI functionality, but it is possible
to add support in the future.
Only works with 1.2V, 2.5V, and 3.3V. The FPGA pins are not 5V tolerant. There is a level translation board that will be made available soon.
The core is not well tested, thorough testing is recommended
before use in a product.
Template - Template with everything needed to start your own C program.
bin - Contains compiled bitstream and BMM targeted for Butterfly Flight hardware.
main.c - Template c file to insert code.
Makefile - Custom Makefile that compiles main.c using avr-gcc, merges main.c into the bitstream, and loads the bitstream to the Butterfly Flight hardware.
run.bat - Batch file that runs a make program to initiate the compilation and programming process.
BPW5007-Switch2LED - Example avr-gcc program that allows the LED's to be controlled by the pushbuttons on the Button/LED Wing. Example is meant to run on the Butterfly Flight hardware.
Port_Blink - Example avr-gcc program that blinks the LED's on the Button/LED Wing at different rates. Example is meant to run on the Butterfly Flight hardware.
Virtual Processor - An 8-bit soft core
that is compatible with the AVR
ATmega103. Includes support for the
avr-gcc toolchain for programming in C.
This core is also known as AVR8.
