The first prototypes are built and the results of the initial testing is in the projects Wiki pages.
Overview
OpenBench Logic Sniffer is an open source logic analyzer hardware design. It’s purpose is to provide a hardware platform for the SUMP logic analyzer at the lowest possible cost.
The OpenBench Logic Sniffer is a purpose-built logic analyzer board designed to be low cost but high speed. It sacrifices a lot of the features you’d look for in a full-scale FPGA development board to achieve our primary goals:
70MHz+ sample speeds
32 channels
16 buffered, 5volt tolerant channels
USB interface, USB powered
USB upgradable everything
Make it as DIY as possible
Make it as open source as possible
$30-$40 price range
We didn’t quite hit our initial price range, but we got really close.
Michael Poppitz was the original author of this great Logic Analyzer design. He wrote the original VHDL and Java client and released it GPL at http://www.sump.org/projects/analyzer/. Please visit his website for more information.
Jonas Diemer took the original design and ported it to the Spartan 3E by utilizing BRAM instead of SRAM he also integrated a RLE into the design. His source can be downloaded here.
The very latest development for the Java client is hosted on SourceForge here.
OakMicros has created a very nice tutorial for the Java client here.
Pictures
This open source hardware and software is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. If you can't accept this risk, please do not buy this hardware.
