Stepper Controller Peripheral Core
This is a stepper controller peripheral core written in both Verilog and VHDL. The core works with most standard stepper motor controller driver ICs with internal translator and STEP/DIR parallel interface, like the 1-Axis Stepper Motor Controller Wing and many others.
This core presents easy to use register-based interface using 5 16-bit registers (or 10 8-bit) to run a stepper motor. It supports microstepping by providing access to microstep select inputs of the target stepper controller IC. Basically, this peripheral core eliminates the software overheads required to generate timed pulses to the stepper motor required for it to run. Although controlling a stepper motor is traditionally the task of a timer ISR, the overheads and latencies it involves especially in a multi-axis system can be quite high. This core enables you to free the CPU for more important tasks, making it possible to use a smaller and relatively slower CPU for the given purpose. Technically, this peripheral replaces a timer which along with an ISR is used to control a stepper motor. Thus, using this peripheral also saves some valuable FPGA space otherwise used by a full-fledged timer.
It also allows to implement acceleration/deceleration of the motor by providing interrupts when pulse duration can be changed. Once the motor reaches desired speed, interrupts can be turned off. It also has a step counter and a register to specify number of steps to be generated before issuing an interrupt. This feature is most useful in positioning systems where precise number of steps need to be made.
The Stepper Motor Controller Peripheral interface consists of 5 user accessible registers:
Base address is defined by the bus controller in higher hierarchy of HDL code. All these registers are 16-bit wide. For 8-bit access, above registers are broken into two 8-bit registers each with suffixes 'L' and 'H' for low and high bytes respectively.
The control register controls the functioning of the this core. Some of these bits directly drive the stepper driver IC's control inputs:
Simplified Block Diagram
Sample C code
Here a sample code to initialize the stepper controller peripheral and run a motor at 150 rpm and generate an interrupt after 32 steps:
// Assumptions: System clock frequency is 8 MHz
The simulation of above code shows: